Many semiconductor devices are fabricated in large numbers on a substrate. During fabrication they incorporate at least one layer of a metal. Most metal layers applied to semiconductors devices during the fabrication of the semiconductor devices are annealed following their application. Annealing is normally in an oven or the like for a period of time and a predetermined temperature. Often the temperature is relatively high, for example, the annealing temperature for the Ohmic contact metal to n-type GaN is done at 900 C [Z. Fan et al, Applied Physics Letters, Volume 68, page 1672, 1996]. The use of relatively high temperatures has many problems that degrade device performance. For example, unwanted atomic diffusions can take place at high annealing temperatures, degrading the device performance. It is desirable to have the annealing done at low temperatures, preferably at room temperature. Due to the difference between the thermal expansion coefficients of different materials on a wafer (such as, for example, the substrate, epitaxial layers, metals, dielectrics, and so forth), conventional annealing often causes thermal stress in the wafer as the heating is applied to the whole wafer. If the stress is not buffered properly, it often causes cracking in the wafer or the peeling of thin films from the wafer, or creating defects in the wafer. This is especially true in certain wafer fabrication technologies where the substrate is removed and the epitaxial layers are bonded to another mechanical support that acts like a new substrate.